Many electronic devices, such as personal computers, workstations, computer servers, mainframes and other computer related equipment, including printers, scanners and hard disk drives, make use of memory devices that provide a large data storage capability, while attempting to incur low power consumption. One type of memory device that is well-suited for use in the foregoing devices is the dynamic random access memory (DRAM).
The demand for larger capacity of memory devices continue to rise and at the same time chip size limitations bound the capacity of these memory devices. The surface area occupied by the components of individual memory cells has been steadily decreased so that the packing density of the memory cells on a semiconductor substrate can be increased along with the gate delays being decreased. Shrinking of the device surface area can result in reducing manufacturing yield, as well as increasing the complexity of interconnects used to connect the numerous banks within the DRAM devices with other devices. Additionally, during miniaturization, interconnect delays do not scale as well as gate delays.